The present invention relates to a squelch circuit to create a squelch waveform prescribed in the universal serial bus 2.0; and, more particularly, to a squelch circuit capable of detecting whether an absolute value of input voltage is over a specific voltage difference or not.
Generally, a squelch circuit has been used to reduce noises of signals received from telecommunication equipments. For example, when a noise of input signals is over a specific value, the squelch circuit in a receiver stops receiving the signals in order that the input noise from outside is not outputted through an output terminal in the receiver and it automatically blocks the power of the receiver. Further, in other fields, the squelch circuit has been widely used in various circuits, which are required to output a signal when it is over a specific value.
In the universal serial bus (hereinafter, referred to as USB), the squelch circuit detects an input signal that is over a specific voltage difference and then outputs a squelch signal, the USB operates in a high-speed mode.
Referring to FIG. 1, a conventional squelch circuit includes a detector and an output unit 20. The detector 10 determines whether a voltage difference between two input signals (dummy input data) Din and DinB is over a specific value. The detector 10 includes: a buffer U1 receiving the two input signals Din and DinB and then outputting an output signal having a hysteresis characteristic; an AND gate U3 combining the output signal from the buffer U1 and an inverted output signal via a delay inverter U2; and a diode U4 connected in series to the AND gate U3.
The output unit 20 receiving an output signal from the diode U4 includes a resistor R1, a capacitor C1 and an output buffer U5. The resistor R1 and the capacitor C1 are provided to determine whether a voltage difference between the output signals from the output buffer U5 and the input signal from the diode U4 is maintained at a specific value.
Referring to FIG. 2, when the voltage difference between the two input signal Din and DinB is over a specific value (V1), the input buffer U1 outputs an output signal having a hysteresis characteristic. The output signal from the input buffer U1 is inverted via the delay inverter U2 and the output signals from both the input buffer U1 and the delay inverter U2 undergoes a logic multiplication in the AND gate U3, thereby forming one-shot-pulses with a shorten pulse width. These one-shot-pulses are continuously transferred to the output unit 20 via the diode U4. Accordingly, an input voltage of the output buffer U5, which is over a specific value, is made by these transferred pulses. If the input voltage of the output buffer U5 is over a specific value, a squelch signal is created in a high voltage level in the output unit 20, and if not, it is created in a low voltage level in the output unit 20.
As a result, if the voltage difference between two input data is V1, a logic high squelch is issued and if the voltage difference between two input data is xe2x88x92V1, a logic low squelch is issued. FIG. 2 is a waveform of the typical squelch signal.
However, the squelch signal required in USB 2.0, which is issued when an absolute value is over a specific value, cannot be provided by the squelch circuit of FIG. 1.
It is, therefore, an object of the present invention to provide a squelch circuit in compliance with the specifications of USB 2.0.
It is another object of the present invention to provide, a squelch circuit, which is not dependant on a common mode voltage of input signals and then has a wide operating range for the input signals.
In accordance with an aspect of the present invention, there is provided a squelch circuit comprising: a first differential amplifier for receiving first and second input signals, for sensing a first voltage difference between the first and second input signals and for outputting a first sensing signal when the first voltage difference is over a specific positive value; a second differential amplifier for receiving the first and second input signals, for sensing a second voltage difference between the first and second input signals and for outputting a second sensing signal when the second voltage difference is over a specific negative value; an offset current determining unit coupled to the first and second differential amplifiers for respectively controlling first and second offset currents of the first and second differential amplifiers to determine the specific positive and negative values; and an output unit for outputting a squelch signal in response to the first and second sensing signals.
In accordance with another aspect of the present invention, there is provided a squelch circuit comprising: a first differential amplifier for receiving first and second input signals, for sensing a first voltage difference between the first and second input signals and for outputting a first sensing signal when the first voltage difference is over a specific positive value; a second differential amplifier for receiving the first and second input signals, for sensing a second voltage difference between the first and second input signals and for outputting a second sensing signal when the second voltage difference is over a specific negative value; a first current path coupled to the first differential amplifier for by-passing an offset current of the first differential amplifier to determine the specific positive value in response to the first and second input signals; a second current path coupled to the second differential amplifier for by-passing an offset current of the second differential amplifier to determine the specific negative value in response to the first and second input signals; and an output unit for outputting a squelch signal in response to the first and second sensing signals.